Tuesday, May 31, 2011

DirectDrive v1.0

"Hey Shane, why don't you build a larger controller that does more current?"
-Everyone.

Because...I...don't.....ok, whatever.


Rather than mess around with a new 3ph revision, I'm just going to start a brand new controller series, to try out some of the crazy stuff I've been wanting to try that's too risky to test on controllers I actually need. 3ph v3.1 works nicely at 40V and 40A. It's finally free of noise issues and has been running on Pneu Scooter for almost half a year now. But in the interest of satisfying some more demanding brushless motor applications, I'm shooting for 50V (DC) and 200A (peak phase current). So I'm going back to v1.0 and I will call this series DirectDrive...




...because it uses a crapload of DirectFETs. DirectFETs are one of the big things I've been meaning to try out on a motor controller. They're an International Rectifier proprietary package that eliminates plastic and bond wires in favor of...just...metal. It's about as minimalist a package for a power MOSFET as you can imagine, and in addition to low resistance due to increased die area, they can also get rid of heat more easily thanks to exposed metal cans that can be directly attached to a heat sink. 

They're also less than 0.7mm tall.
The particular part being used on this controller is the IRF7759L2TRPbF, a 75V FET with a typical on-resistance of 1.8mΩ. There are four in parallel for each leg of the three-phase bridge. The layout is one I've been thinking about for a long time that uses the DirectFET package (can) as a sort-of bus bar to augment the current-carrying capability of the traces and to jump the three phase outputs across the negative bus to the outer edge of the board:


It even looks like a three-phase bridge. The phases are arranged in three columns and the phase output is the giant strip of through-hole pads at the bottom edge of the board. All the high side FETs are connected together at the can (drain). There are traces that link them and the bus capacitors on the top of the board, but for the most part current will go straight through the cans themselves. Likewise, the phase outputs jump over the negative DC rail by way of the low-side FET cans. Conductive FET packages are like having an extra PCB layer to play with. Of course, the can resistance (measured to be about 0.15mΩ) will add to the total heat dissipation.

Here's what it looks like on the bottom.
One of the risks of using the DirectFETs that's prevented me including them on a controller so far is the fact that they are impossible to solder with an iron. The gate and source terminals are on the underside of the FET. IR has a 33-page app note entirely about how to reflow the DirectFET packages. I don't have regular access to a reflow oven, but this video convinced me that it would be possible to do with just a hot air station. I tried it out on one of Matthew's test boards, without the stencil, and it seemed to work okay. The measured resistance after soldering was about 2mΩ. How the array of 24 will behave, especially in terms of overall straightness and flatness post-soldering, will be an interesting experiment.


The reason flatness came to mind as a potential problem is because of the massive heat sinking requirement of this board. Even if it were 99% efficient, a 50V/200A controller would have to shed 100W somehow. The DirectFETs provide plenty of area for extracting heat, but we're still talking about the sort of cooling requirements you'd have in a beastly processor. So, what isn't pictured above is the sizable heat sink and fan that will be required to actually run at 200A for any extended period of time. For a quick burst, though, the 1/4" slab of aluminum will provide some thermal mass buffering. Between the sink and the FETs will be a 0.5mm silicone thermal interface material, to fill the gaps and isolate the sink from the electrically conductive cans.

This will also be, oddly enough, the first controller I've ever designed with on-board temperature measurement. I wanted to use a linear temperature sensing IC instead of having to calibrate thermistor curves, but they don't make one that would fit in the gap between the board and the heat sink...

...oh wait yes they do. The TMP20 sensor from Texas Instruments is a mere 0.5mm tall, making it actually shorter than the DirectFETs. On the board, it takes up less than 2mm x 2mm, which means it's basically invisible and probably very difficult to solder.

The thing next to it is a 0603 thermistor...
Because it basically doesn't even exist, I could put it in a tiny gap at the intersection of the high side and low side FETs on one of the phases. It will be in contact with the heat sink, and has a local ground plane to conduct heat into it. But it's so small that it probably instantly assumes the temperature of whatever it's touching anyway. It's also right next to the logic side of the board, allowing easy access for 3.3V, signal ground, and the analog output. Just in case it folds itself up into nothingness or explodes due to dV/dt induced nastiness, I put a 0603 thermistor footprint right next to it.

The power layout of this board was probably one of the most fun layouts I've done, ever. I had it basically finished a few weeks ago, after I converged on a very nice interleaved bus capacitor arrangement:


You might have to use your 3D imagination skills a little here. It jumps between layers a lot. The vias will need to be filled with solder to carry the full current, but I think that's standard practice for high power-density controllers. There are five 18mm surface-mount electrolytic capacitors on board for a total of 3300μF at 63V. The capacitance is high enough, but the ESR may cause problems running at 200A. External capacitance is not out of the question. Additionally, there are software games you can play to minimize the ripple on the bus capacitors in a three-phase inverter.

I have no idea how it will perform, but I also really like the way the gate drive escapes from the power section up to the top of the board. Crossing over traces under the capacitors frightens me a little bit, but it cleans the layout up nicely and I think gate signals are low-enough impedance to blast through any EMI issues. I think... 

Speaking of EMI, although the 3ph controllers since v3.0 have made good use of the IRS21844 half-bridge integrated gate drivers, I've decided to retreat to the comfort and safety of the optocoupled gate drive that I used in 3ph 2.1 and, the ultimate FET killer, Cap Kart. The idea is fairly straightforward:


Each MOSFET is driven by a gate drive optocoupler, formerly the HCPL-3120. The output of the gate driver is a push-pull driver that runs on 15V, either directly from a 15V supply (low side) or a bootstrap capacitor (high side). The input is just an LED. If the LED is on, output is driven high, if off, the output is driven low. The LEDs are connected in anti-parallel. A simple inverter and low-pass filter circuit ensures that a) both LEDs can't be on at the same time and b) there is a suitable delay between turn-off of one LED and turn-on of the other. This is passive shoot-through protection. Importantly, the logic side is entirely isolated from the noisy power side by virtue of the optical interface.

Switching four parallel IRF7759L2TRPbF FETs is a tall order for the 2.5A HCPL-3120, though. The total gate charge per FET is 200nC and the "switch charge" is 73nC. Even if the gate driver were operating at 2.0A for the entire switching period, it would take 4*200nC/2A=400ns to fully turn on or off the FETs. It's similar in switching effort to Cap Kart's half-bridge, but unlike Cap Kart it's being designed to run at 15.6kHz and has three phases.

This is not a happy gate drive.
Avago Technologies to the rescue. It's been a couple years since I browsed the gate drive optocoupler selection, and in that time a new, 5A version has come out. The ACNW3190 is more-or-less pin compatible with the HCPL-3120, and should be able to switch the four parallel FETs in a more reasonable amount of time. This will be the first time I'm trying them out, though.

There's one more "new" trick I am trying out, probably the most risky one of all. You may have noticed the odd, broken traces on the A and C phase:


And the islanded SOIC8 chip on the top layer. This is, in fact, an attempt at through-the-board Hall effect current sensing. The chip is a LEM FHS 40-P current sensor. Actually, it's more like a magnetometer, measuring field strength to the right, looking down on the chip. The traces passing under the chip produce a magnetic field according to the right-hand rule. 


I've use Hall effect current sensors before, but never a remote-sensing one like this. It is a little worrying because they can easily pick up stray magnetic fields. I've taken a few steps to minimize this: I used the A and C phases to keep them as far away from each other as possible. Also, all the power wires leave the board perpendicular to the current-carrying traces designed to be sensed. This way, they do not contribute to the measured field. Presumably, any static errors can be calibrated out, but there's also the potential for external fields from things with magnets in them, like perhaps motors. Of course, this would be a problem with regular Hall effect current sensors as well. Only one way to find out how they perform.

Oh yeah, I forgot to mention the purpose of the broken traces. The FHS 40-P is designed for, at most, 100A sense current through the board, with a single large trace running directly under the center of the chip. At the definite expense of resolution and the possible risk of lower noise immunity, I'm trying to sense an even larger current by moving the current-carrying wires farther away from the center of the chip. The broken traces can be selectively jumpered to "program"  the gain of the current sensor to my liking.

To improve the noise immunity of the current sensor signal Because I am too lazy to route the traces, the current sensors are actually connected to the logic side of the board via external three-wire cables, almost as if they were separate modules altogether. As an added bonus, if they don't work out, I could possibly use external current sensors anyway. Though in reality I would probably consider that a big enough failure to merit a v2.0 design revision. The two phase currents, as well as the Hall effect encoder and throttle signals, come in to the logic board via two rows of headers:


There's also an auxiliary current sense input which could be used for sensing DC current, as well as a spare analog channel. Differential voltage sensing is also available, though it comes in through a separate input near the bottom of the logic section. The logic board and power supply are the same as on 3ph 3.1, including the DCR021205 isolated regulator that saved the day last time. It will run my field-oriented control code for the STM32F103, so there shouldn't be any software surprises.

The entire controller is just about 4"x3"x1", or one standard EAGLE brick. (3ph 3.1 is an EAGLE half-brick.) The power to area ratio is quite high, which means that cooling will be a big challenge if it is to actually run at 200A. But even having a nice 100A continuous controller around will be handy, I think.

Board have been ordered. Actually, since it's v1.0, I only ordered one board. For some reason, my v1.0 motor controllers never seem to work. (And I know v1.0 of everything is usually not a complete success, but I'm talking about spectacular failures here.) So I'm not going to get my hopes up right away. But it's nice to finally be working on motor controllers again.

18 comments:

  1. What are your thoughts on high voltage switching with something like Silicon Carbide JFETs - http://semisouth.com/
    They're designed for automotive, but there are some DIY guys doing class A audio amplifiers with them, and you can get smaller quantities through group buys last I checked.

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  2. I've never had a need to switch that much voltage, and if I did I would be heading in the direction of IGBTs. But I understand why JFETs are better for audio. Dare I ask what kind of audio system?

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  3. Yeah, the amp is the First Watt J2: http://www.6moons.com/audioreviews/firstwatt10/j2.html
    He'll release schematics when he's sold the minimum number. But a basic schematic is on his site. The second page of the review shows some pictures inside the amp. Pretty simple really.

    I thought a lot of current electric motor stuff was at high voltage? Tesla is around 300V and MotoCzysz is almost 500V. I don't know how these JFETs stack up to IGBTs, but I've got to imagine they're better, or they wouldn't compete. I think they're somewhere around $10 each.

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  4. Shane, did you have to do anything special to get regenerative braking with your style of FOC?

    If you set your d-axis control point to be negative, do you just "magically" get negative current? Did you have to do any circulating/chopping with the phase currents to boost the back-EMF above bus voltage?

    I've been trying to work it out on paper but I thought I should just ask.

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  5. Err, sorry, I meant the q-axis control point.

    My questions come from both your code and Mevey, since both seem to "automagically work" with regenerative braking without much specific mention of it.

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  6. That's exactly right: you can command a negative q-axis current and the same FOC control loop will adjust the voltage amplitude (duty cycle) downward until it is less than that of the back EMF. Then, the three half-bridges will work like boost converters, pushing current back into the power supply. Each half-bridge does this independently on each phase, if they are using synchronous rectification. Here's a simulation showing this with a single phase:

    http://www.falstad.com/circuit/#%24+1+5.0E-6+0.05817778142098084+28+5.0+50%0A159+336+128+336+192+0+0.0050+1.0E10%0A159+336+240+336+304+0+0.0050+1.0E10%0AI+272+272+320+272+0+0.5%0Aw+320+160+240+160+0%0Aw+240+160+240+272+0%0Aw+240+272+272+272+0%0Av+144+256+144+176+0+0+40.0+24.0+0.0+0.0+0.5%0Aw+144+176+144+112+0%0Aw+144+112+336+112+0%0Aw+336+112+336+128+0%0Aw+336+304+336+320+0%0Aw+336+320+144+320+0%0Aw+144+320+144+256+0%0Ar+416+224+480+224+0+0.05%0Aw+512+224+480+224+0%0Av+512+288+512+256+0+0+40.0+12.0+0.0+0.0+0.5%0Aw+512+256+512+224+0%0Aw+512+288+512+320+0%0Aw+512+320+336+320+0%0Ag+144+320+144+352+0%0AR+224+160+192+160+0+2+10000.0+5.0+0.0+0.0+0.4%0Aw+224+160+240+160+0%0Al+400+224+352+224+0+0.0010+32.021129120979545%0Aw+416+224+400+224+0%0Aw+352+224+336+224+0%0Aw+336+224+336+240+0%0Ad+368+304+368+256+1+0.805904783%0Aw+336+320+368+304+0%0Aw+368+256+336+240+0%0Ad+368+192+368+144+1+0.805904783%0Aw+288+208+288+224+0%0Aw+336+224+336+208+0%0Aw+336+208+368+192+0%0Aw+336+208+336+192+0%0Aw+368+144+336+128+0%0Ao+13+1+0+35+2.5+51.2+0+-1%0A

    That's for DC, but imagine instead the switches were controlled to produce a sine wave and the back EMF was a larger sine wave of the same frequency and nearly the same phase. At any instant in time, it is like the DC case, either with positive or negative voltage. If the source is smaller than the back EMF, power will flow out of the back EMF and into the source.

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  7. @J:
    Yep, most large EVs use IGBTs and run a DC bus in the 200-600V range.

    How I would compare the SiC JFETs to an IGBT would be the voltage drop at rated current. So for example one of the JFETs has an on-resistance of 0.063Ω and a continuous current rating of 30A. So, the voltage drop will be about 1.89V. You can compare that to the Vce vs. Ic of a similarly-price TO-247 IGBT. I think they would be pretty close.

    There may be other reasons to use the JFET besides power dissipation, though. It almost definitely switches faster.

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  8. Shane, that's a phenomenal explanation, and a beautiful simulation to go with it. Thanks!

    I was going to bring up synchronous rectification but that covers it wonderfully.

    One nagging thought: if all the phases are controlled separately, what's to prevent two half-bridges from both switching from "circulate" to "chop" at roughly the same time?

    That would just allow current to circulate in a different loop instead of flowing back to the bus, right?

    Ex: http://geekshavefeelings.com/files/screenshots/2011-06-14_23-03-27.png
    - Let the circuit you gave be switches A & U inverting motor terminal 1.
    - So when A is off (U is on), the current shown circulating in the FETs is 1->U->V->2->1. (V could be V's diode?)
    - When A is on (U is off), switch B also switches on to carry the current for another phase.
    - Now the current between 1 & 2 has a loop with very low resistance: 1->A->B->2->1.

    I'm guessing this is one of those "automagicatically works" things again. For all I know (honestly I don't know much about this), this is some special case that could never happen.

    If it can happen, is this why you use different timers for different PWM channels instead of different channels within one STM32 timer? It seemed like an odd code choice but I guess it could prevent the "all high FETs on" and "all low FETs on" cases when duty cycle is low and the timer bases are offset.

    (BTW, thanks for the applet link. I haven't used those applets since freshman physics in high school and completely forgot about them!)

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  9. That's a tough question...I'll do my best:

    First, I follow your explanation using the A, B, U, and V switches and I agree that the current would just follow a different loop as you have described, and no current would return to the bus. I would like to try to come up with a simple physical explanation for this so it isn't just magic.

    The way I often analyze half-bridge based converters is to look at the average voltage at the phase. In the case you described, if the duty cycle for A/U is the same as for B/V, then the average voltage on each phase is the same. (If they are both 50%, it is half the bus voltage.) Thus, the average voltage applied to the motor terminals is zero. Even if current is flowing, causing the motor to slow down, no power is delivered into the bus because the voltage applied by the inverter is zero. This would also be true of both duty cycles were 25%, or 75%, or any other value.

    In another case, imagine if the A/U duty cycle is 75% and the B/V duty cycle is 25%. Now the average voltage on phase A is greater than the average voltage on phase B. The average voltage on the motor terminals is the difference between these two. If that voltage is greater than the EMF, power flows out of the bus, into the motor. If that voltage is less than the EMF, power flows out of the EMF, into the bus.

    This also does not take into account commutation phase at all, which matters for a brushless motor. That's where the field-oriented control is useful, as it keeps the current in-phase with the EMF. But otherwise the same principle applies: the average voltage on the three phase outputs looks like three sine waves in phase with (or slightly ahead of) the EMF which could be larger or smaller in amplitude than the EMF.

    There's another phase that is important as well, though: the phase of the PWM pulses themselves. In your example, both A/U and B/V switch at the same time. But they don't have to. You could have them switch at 50% duty cycle but completely out of phase. In that case, the average voltages look the same and the average power transfer argument is the same, but the instantaneous current paths and power transfer is much different. Now, current is always flowing into or out of the bus, whereas before it was always circulating in the inverter. Even though the average is the same, it puts more stress on the bus capacitor. So little details like this matter for choosing components and optimizing efficiency, but the general operation can usually be determined just from an averaging argument.

    The reason I used three different timers instead of three channels on a single timer is actually much sillier: I wanted to play MIDI music through the motor. In that case, not only is the phase of each PWM independent, but so is the frequency. So it can play three musical notes at the same time, while still executing field oriented control by adjusting the duty cycle. ;)

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  10. Oh, of course! For some reason I just assumed the MIDI was modulated atop the PWM rather than the phases each having their own frequency.

    Using your average voltage explanation and thinking more about the commutation really wrapped up the whole methodology for me.

    Basically, I was thinking about phase voltage completely incorrectly. I was thinking of voltage across a phase as the voltages at each of the motor terminals, relative to bus ground. That made way less sense than the *differences* in voltage *between* the terminals, based on the duty cycles of the each inverter leg.

    I think I grok you: what you're saying is that because my example case requires that current be flowing from 2 to 1, voltage at 1 is higher than 2. Thus the duty cycle at A/U is higher than B/V (given perfectly implemented FOC), regardless of PWM phase, because the current control is pumping up magnitude to meet the back-EMF.

    Whether A/U is in phase with B/V determines only how much their "on" times overlap (causing circulation in the high side switches) or don't overlap (causing current across the bus, backwards through the cap). But, the as long as the average voltage difference is lower than the phase back-EMF, current will still flow back to the bus.

    At first I was thinking that this PWM phase shift would affect how much negative torque is applied, since it seemed like the circulated current would cause more braking torque than the current through the bus cap. Then I remember that this is all current controlled: no matter which loop the current flows through, it's controlled to be a constant, and so torque must be constant as well.

    Thank you so much for your patience and time in clearing this up! This has all been a tremendous help to me; hopefully I can take this knowledge and turn it into something useful. :)

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  11. Holy mother nature. Can you really use the DirectFET cases to carry the current like that? I wanted to use DirectFETs in a project for a while, but the layout was proving to be complicated due to the placement of the drain and source pads on the device.

    Paralelling of N mosfets are easy with DirectFet, but when you want to go to a bridge configuration, then connecting the source to the drain of another FET gets complicated, especially when your PCB traces need to carry high currents.

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  12. I don't know if it's accepted practice, but it certainly works. The L8 package DirectFET cans have a resistance of about 0.16mΩ from drain pad to drain pad, so for a 2mΩ FET, this adds an additional 10% of heat generation. But it simplifies layout a lot, as you can see.

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    Replies
    1. Is very good.
      I can not speak English.
      Sure you are wondering a few oz PCB copper foil thickness.
      Answer please.

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    2. The PCB is only 1oz copper for now. I will most likely increase to 2oz copper once I know that it works well. It is designed so that most current flows through the can of the MOSFET, though, so the copper doesn't need to conduct the full current.

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  14. Hi Shane
    I saw your DirectDrive, really cool!
    How many oz copper did you use to carry this huge current?

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    1. Thanks! The PCB is only 1oz copper for now. I will most likely increase to 2oz copper once I know that it works well. It is designed so that most current flows through the can of the MOSFET, though, so the copper doesn't need to conduct the full current.

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